Method and control circuitry for a three-phase three-level boost-type rectifier

ABSTRACT

A synchronized control method for a three-phase three-level boost-type rectifier with reduced input current ripple and balanced output voltages is disclosed. The proposed control allows simplifying the control circuit as much as possible without compromising the rectifier performance. In fact, besides simplicity, the control method featured synchronized command signals to de switching devices, minimized input current ripple, full controllability of the output voltage, dynamic balance of the output center point, constant switching frequency, simplified design of EMC filters, good transient and steady state performance, and low cost. The invention described first the most important configurations that the three-phase three-level boost-type rectifier may assume and studied the converter&#39;s operation. The concept involved for output voltage, input current, neutral point balance and control system design was presented.

I—TECHNICAL BACKGROUND

1 Technical Field

The present invention is related to the electrical rectifier field, morespecifically, to the field of control techniques for the three-phasethree-level boost type rectifier.

This work introduces a new control method and control circuit for athree-phase three-level boost-type rectifier. Under the proposed controlmethod and control circuit, the rectifier performs three-phase AC-DCconversion generating sinusoidal input currents with reduced ripple andnear unity power factor while balancing the two DC output voltages. Thecontrol circuit uses two triangular carriers with the same amplitude but180 degrees phase-shifted; Trg1 is used during the positive halve cycleand Trg2 for the negative one. The advance of the method is that theswitching pulses are synchronized and appropriately distributed,allowing the reduction of the input current ripple. An effective balanceof the output voltage is obtained by adding a sensor that acts over theinput current waveform reference. In addition, the control systemfeatures simplicity and low cost.

2 Background

With the development of power electronics technology and the generalizedutilization of equipment with non-linear characteristics such aselectronic rectifiers or static converters AC-DC, there have beenincreasing utility pollution problems produced by large distortedharmonics currents drawn from the power distribution systems [See P.Rioual and T. Deflandre, “Impact on the Distribution and TransmissionSystems of Harmonic Current Injection due to Capacitive Load Rectifiersin Commercial, Residential and Industrial Installations”, ConferenceRecords of EPE'95, pp. 3.503-3.508, 1985, and Yu-Kang Lo and Neng-ChinLia, “On Evaluating the Input Current Distortion with Current Slopes forSingle-Phase Switch-Mode Rectifiers”, Conference records of PESC'98, pp.77-80, 1998]. Harmonic currents cause additional harmonic losses in theutility system and may excite electrical resonances, leading to largeovervoltages; thus disturbing other sensitive loads connected to thesame supply [See Ned Mohan, Tore M. Undeland, William P. Robbins, “PowerElectronics Converters, Applications, and Design”, John Wiley & Sons,1989].

The uncontrolled and thyristor bridge rectifiers are widely usedinterface between utility and power electronics systems. Although theyare very simple in structure and robust in operation, they have thedisadvantages of drawing a large amount of harmonic current from utility[See Hirofumi Akagi, “New Trends in Active Filters for PowerConditioning”, IEEE Transactions on Industry Applications, Vol. 32, No.6, pp. 1312-1322, 1996]. Recently the harmonics produced by suchnonlinear loads have become a serious problem in many countries.

To prevent the problem to become intolerable, various standards andguidelines such as the IEEE 519 and the IEC-555, have been establishedwhich specifies limits on the magnitudes of harmonic currents andharmonic voltage distortion at various frequencies [Ned Mohan et al.,op. cit.]. Simultaneously, much effort has been carried out to developpower converters with low harmonic current injection to utility andcapable to control the input power factor.

Modern AC-DC converters are expected to draw sine-wave current from themains, with power factor very close to unity. In other words it isrequired that the converter presents a resistive load to the mains[Javier Sebastian and Miguel Jaureguizar, “Tendencias Futuras en laCorrección del Factor de Potencia en Sistemas de Alimentación”,Conference records of CIEP'93, pp. 136-153, 1993]. In general, besidesthose characteristics, the target is low circuit complexity, lowcomponent stress, high power density, high efficiency, high reliability,and controllability of the output voltage.

In single-phase applications, one of the most popular power circuitschemes for power factor correction is the boost converter topology. Afrond-end rectifier diode bridge followed by a boost DC-DC convertercomposes the topology. The technique has been extended to three-phaseapplications using a three-phase diode bridge and a single switch boostDC-DC converter operating in discontinuous conduction mode [A. R.Prasad, P. D. Ziogas, and S. Manias, “An Active Power Factor CorrectionTechnique for Three-Phase Diode Rectifiers”, IEEE Transactions on PowerElectronics, Vol. 6, No. 1, pp. 83-92, 1991] The single active switchthree-phase preregulator presents low cost and simplicity but thetopology has as drawbacks high conduction losses, high switchingstresses, and radio interference emission regulations resulting in alarge input filter.

Circuits with multiple configuration and advanced designs are actuallyconsidered to increase the power levels and improve the generatedwaveforms [See A. Nabae, I. Takahashi and H. Akagi, “A NewNeutral-Point-Clamped PWM Inverter”, IEEE Transactions on IndustryApplications, vol. IA-17, No. 5, pp. 518-523, 1981; and J. W. Kolar, H.Ertl and F. C. Zach, “Design and Experimental Investigation of aThree-Phase High Power Density High Efficiency Unity Power Factor PWM(VIENNA) Rectifier Employing a Novel Integrated Power SemiconductorModule”, Conference records of APEC'96, pp. 514-523, 1996].

In fact, multilevel converters are starting to be used in industry andtraction applications and its future seems promissory [See T. Katta, Y.Kurokawa, “Advanced Inverter Control System Using High Voltage IGBT forEMU” Conference records of IPEC'95, pp. 1060-1065, 1995 and S. Bernet,“Recent Developments of High Power Converters for Industry and TractionApplications” Conference records of COBEP'99, pp. 3-16, 1999].

The multilevel converters present some advantages over conventional twolevel converters such as:

The voltage imposed across the switching devices is reducedproportionally with the number of levels. In this way, it is possible touse them in high voltage systems increasing the converter capability [R.Rojas, T. Ohnishi, T. Suzuki, “PWM Control Method for a Four-LevelInverter”, IEE Proceedings on Electric Power Applications, vol. 142,Issue 6, pp. 390-396, 1995].

Improve significantly the voltage and current waveforms, which resultsin a substantial reduction of the harmonic distortion [N. S. Choi, J. G.Cho and G. H. Cho, “A General Circuit Topology of Multilevel Inverter”,Conference records of PESC'91, pp. 96-103, 1991 and J. Lai and F. Peng,“Multilevel Converters—A New Breed of Power Converters”, IEEETransactions on Industry Applications, vol. IA-32, No. 3, pp. 509-517,1996]. This is probably the best characteristic of the multilevelconverters because the actual tendency is to improve the waveforms ofthe power electronic circuits.

The electromagnetic interference is smaller than that of conventionalconverters because the voltage variation (dv/dt) at the commutationinstant is divided by the number of levels [T. A. Meynard and H. Foch,“Multi-Level Conversion: High Voltage Choppers and Voltage-SourceInverters”, Conference records of PESC'92, pp. 397-407, 1992]. In theEuropean countries there is already a strict norm to limit theelectromagnetic interference and other counties will follow theirexample.

An interesting configuration for a three-phase three-level rectifier hasbeen considered lately by several researchers [See Ewaldo L. M. Mehl andIvo Barbi, “An Improved High Power Factor and Low Cost Three-PhaseRectifier”, Conference records of APEC'95, pp. 835-841, 1995; and J. W.Kolar, H. Ertl and F. C. Zach, “Design and Experimental Investigation ofa Three-Phase High Power Density High Efficiency Unity Power Factor PWM(VIENNA) Rectifier Employing a Novel Integrated Power SemiconductorModule”, Conference records of APEC'96, pp. 514-523, 1996]. Theconverter is composed by a combination of diodes and switches adjustedto the requirements of generating an input current nearly sinusoidalwith high power factor and low total harmonic distortion while achievingthe requirements of high efficiency, high reliability and controllableoutput voltage.

So far several control schemes for the three-phase three-level boosttype rectifier have been proposed. In the control method proposed in[Ewaldo L. M. Mehl and Ivo Barbi, et al., op. cit.], the active switchesare gated at the line frequency. The bi-directional switches are gatedon at zero crossing of the corresponding phase-voltage. The open loopcontrol is simple and total harmonic distortion may reach acceptablelevels at certain point of operation. However, does not allow outputvoltage control and the harmonic distortion may increase if theconduction angle of the switches is chosen to be different than 30degrees. Therefore, the applications for this type of control arereduced.

Authors of [F. Daniel, R. Chaffai and K. Al Haddad, “Three-Phase DiodeRectifier with Low Harmonic Distortion to Feed Capacitive Loads”,Conference records of APEC'96, pp. 932-938, 1996] made some improvementsin that control, but the controllability of the output voltage is stilla drawback.

The methods introduced in [Yifan Zhao, Yue Li, and Thomas A. Lipo,“Force Commutated Three Level Boost Type Rectifier”, IEEE Transactionson Industry Applications, vol. IA-31, No. 1, pp. 155-161, 1995] and [J.W. Kolar and F. C. Zach, “A Novel Three-Phase Three-Switch Three-LevelUnity Power Factor PWM Rectifier”, Conference records of PCIM'94, pp.125-138, 1994] are based in advanced space vector control and both makeuse of complex digital logic, implemented with digital signalprocessors.

Another similitude of both techniques is the use of hysteresiscontrollers. Those control methods feature low input current harmonics,balance of the center point of the output voltage and highcontrollability of the output voltage. The disadvantages of thementioned methods are: complex and expensive DSP-based control,complicated design of the input EMC filter due to the varying switchingfrequency (inherent problem of hysteresis controllers) and the currentcontrol error may be twice the hysteresis width as stated in [J. W.Kolar and F. C. Zach, et al., op. cit.].

The technique proposed in [P. Prestifilippo, R. Scibilia, G. Baggione,G. Caramazza, “A Switched-Mode Three-Phase 200A/48V Rectifier with InputUnity Power Factor”, Conference records of INTELEC'96, pp. 543-547,1996] consider the three-phase rectifier as three single-phase units andthe control is implemented using commercial single-phase modulators withthree independent current loops. The control is simple, but the inputcurrent ripple is much higher than that of the vector controls discussedabove. Moreover, since three independent current loops are used it isnot possible to synchronize the command signals of the switching devicesand this compromise the control performance. Similar technique was usedin [R. Gules, A. S. Martins and I. Barbi, “A Switched-Mode Three-PhaseThree-Level Telecommunications Rectifier”, Conference records ofINTELEC'99, paper 29-3, 1999] but no further improvements werepresented.

Finally, an interesting control method was presented in [P. Ide, N.Froehleke, H. Grotstollen, “Investigation of low cost control schemesfor a selected 3-level switched mode rectifier”, Proceedings ofINTELEC'97, pp. 413-418, 1990], the double ramp comparison controlconcept was used, synchronizing the main devices command signals andtherefore simplifying the EMC filter, reducing also the input currentripple. However, the control system needs to generate a sinusoidalfunction in order to balance the output voltages. The generation of thisfunction may complicate the control because its phase and frequency mustbe synchronized with the mains.

In this work a new control method for the three-phase three-levelboost-type rectifier will be introduced with the objective of solvingthe drawbacks presented by the above mentioned techniques.

3—Objectives of the Invention

The present invention introduces a new control scheme for a three-phasethree-level boost-type rectifier with reduced input current ripple andbalanced output voltages. The principal objective of the proposedtechnique is to simplify the control circuit as much as possible withoutcompromising the rectifier performance. In fact, besides simplicity, thecontrol method features synchronized command signals to de switchingdevices, minimized input current ripple, full controllability of theoutput voltage, dynamic balance of the output center point, constantswitching frequency, simplified design of EMC filters, good transientand steady state performance, and low cost.

The control system uses two triangular carriers namely Trg1 and Trg2.The carriers have the same amplitude but are 180 degrees phase-shifted;Trg1 is used during the positive halve cycle of the respective phasevoltage and Trg2 for the negative one. An analog switch in each phasepermits the interchange among the triangular carriers. The switchingdevices command signal is obtained comparing the respective referencewith the carriers. Thus the switching frequency is constant. The outputcenter point balance is achieved by adding the positive and negativeoutput voltages and using the sum as an error signal to modify thecurrent waveform reference. This simplifies the control circuit andallows an accurate regulation of the center point potential.

The control system retains all the advances of multilevel converters.When compared with conventional two level systems, the proposedconverter is characterized by a lower blocking voltage of the switchingdevices, lower harmonic distortion on the line currents, lower EMIrejected noise, absence of shoot-through current and offer positive andnegative output voltages.

Compared with the techniques developed in [Ewaldo L. M. Mehl and IvoBarbi, at al., op. cit.], and [F. Daniel, et al., op. cit.], theproposed method increases greatly the controllability of the outputvoltages and reduces the low frequency distortion. Advantages withrespect to vector-control schemes of [Yifan Zhao, et al., op. cit.], and[J. W. Kolar et al., op. cit.], are simplified and cheaper control, andconstant switching frequency, which facilitate the EMC filter design.The new technique offer lower input current ripple than methods based inthree independent controllers such as those of [P. Prestifilippo, etal., op. cit.], and [R. Gules, et al., op. cit.]. The simplicity of thecontrol of neutral potential can be considered as improvement withrespect to the method presented in [P. Ide, et al., op. cit.].

SUMMARY

II. 1. Three-Phase Three-Level Boost-Type Rectifier Circuit Descriptionand Operation.

The three-phase three-level boost-type rectifier may have differentconfigurations, FIG. 1 shows four of the most interesting ones, but theprinciple of operation is basically the same for all of them. Althoughthe circuits of FIGS. 1(a) and (c) have three more switches (S₄, S₅, andS₆), they are activated with the same command of S₁, S₂ and S₃respectively. Therefore, when S₁ is activated, the input terminal “u” isclamped with the DC-link neutral point “O” and e_(uO)=0. When the switchis open, the direction of the input current determines the e_(uO)potential difference. The terminal “u” will be clamped with “P” if i_(u)is positive (e_(uO)=E_(d)); and with “N” if i_(u) is negative(e_(uO)=−E_(d)). The analysis is also valid for the other switching armsand applies to all four topologies. A common equivalent circuit can bedrawn as shown in FIG. 2. According with the switching state of thepower semiconductors, each input terminal has three possible states;therefore, the three-phase system has 3×3×3=27 possible states. Thestates are listed in Table 1 below, which also gives the respectivevoltages referred to the neutral point.

TABLE 1 Switching states and voltages with respect to the neutral point.Group state e_(uo) e_(vo) e_(wo) a {overscore (a)}₁ (PNN) E_(d) −E_(d)−E_(d) {overscore (a)}₂ (PPN) E_(d) E_(d) −E_(d) {overscore (a)}₃ (NPN)−E_(d) E_(d) −E_(d) {overscore (a)}₄ (NPP) −E_(d) E_(d) E_(d) {overscore(a)}₅ (NNP) −E_(d) −E_(d) E_(d) {overscore (a)}₆ (PNP) E_(d) −E_(d)E_(d) b {overscore (b)}₁ (PON) E_(d) 0 −E_(d) {overscore (b)}₂ (OPN) 0E_(d) −E_(d) {overscore (b)}₃ (NPO) −E_(d) E_(d) 0 {overscore (b)}₄(NOP) −E_(d) 0 E_(d) {overscore (b)}₅ (ONP) 0 −E_(d) E_(d) {overscore(b)}₆ (PNO) E_(d) −E_(d) 0 c {overscore (c)}₁ (POO) E_(d) 0 0 {overscore(c)}₂ (PPO) E_(d) E_(d) 0 {overscore (c)}₃ (OPO) 0 E_(d) 0 {overscore(c)}₄ (OPP) 0 E_(d) E_(d) {overscore (c)}₅ (OOP) 0 0 E_(d) {overscore(c)}₆ (POP) E_(d) 0 E_(d) d {overscore (d)}₁ (ONN) 0 −E_(d) −E_(d){overscore (d)}₂ (OON) 0 0 −E_(d) {overscore (d)}₃ (NON) −E_(d) 0 −E_(d){overscore (d)}₄ (NOO) −E_(d) 0 0 {overscore (d)}₅ (NNO) −E_(d) −E_(d) 0{overscore (d)}₆ (ONO) 0 −E_(d) 0 z {overscore (z)}₁ (PPP), 0 0 0{overscore (z)}₂ (OOO) 0 0 0 {overscore (z)}₃ (NNN) 0 0 0

It can be noted that the maximum voltage stress in the power switches isonly half of the DC-link voltage (E_(d)); this allows the use of fasterand cheaper devices. Another significant advance is that there is nopossibility of shot-though current on the rectifier arms, whichsimplifies the gating of the switches.

The switching states can be considered as space vectors, whichcomponents are placed in three axes, namely e_(uO), e_(vO) and e_(wO),separated 120 degrees from each other. The space vector representationis a useful tool to generate advanced PWM (Phase Width Modulation). Ithelps to visualize the amplitude and phase of the voltage vectors. Thespace vector representation of the switching states of the three-phasethree-level boost-type rectifier is shown in FIG. 3.

The voltage vectors have been classified in five groups. The big sizevectors are associated in group “a” they are characterized because theinput terminals are clamped to the positive terminal “P” or the negativeterminal “N”, with no connection to the neutral point. The group “b”corresponds to the medium size vectors; their amplitude is reducedbecause one of the input terminals is clamped to the neutral point.

Groups “c” and “d” refer to the small vectors. The input terminals areclamped to “P” and “O” in the case of group “c” and therefore are calledsmall positive group. In the small negative group (“d”) the inputterminals are clamped to “N” and “O”. The last set corresponds to thezero vectors, group “z”; the three input terminals are clamped to thesame output point “O”, “N” or “P”.

II. 2. Control Methods.

If the converter output voltage is considered constant, the rectifiercan be treated as voltage source connected to the utility through theinput inductors as shown in the equivalent circuit of FIG. 4. Thefollowing relations can be writing by inspection of FIG. 4:$\begin{matrix}{e_{an} = {{L_{u} \cdot \frac{{di}_{u}}{dt}} + e_{un}}} & (1) \\{e_{bn} = {{L_{v} \cdot \frac{{di}_{v}}{dt}} + e_{vn}}} & (2) \\{e_{cn} = {{L_{w} \cdot \frac{{di}_{w}}{dt}} + e_{wn}}} & (3)\end{matrix}$

Form (1)˜(4) it is clear that it is possible to control the inputcurrent by taking action on the rectifier input terminal voltage. Fromfundamental circuit theory it can be determined that for the inputcurrent to be sinusoidal, the input terminal voltages e_(un), e_(vn) ande_(wn) must be sinusoidal as well. Using the concept of instantaneousmean value, it is necessary to generate sinusoidal PWM waveforms at therectifier input-terminals, in other words, those voltages should becontrollable in order to control the amplitude and phase angle of theinput current.

It is well known that vector control schemes allow the generation ofhigh quality waveforms, then it is possible to use the vector analysisas a useful tool to find an improved waveform generation. Let us reviewmore deeply the space vector plane of FIG. 3. For symmetry it is enoughto consider only one 60 degrees interval. There is a restriction thatlimits the number of possible vectors at any instant. Consider forexample that the instantaneous current in one leg is positive, then therelated input terminal can be clamped to the positive terminal if theswitch is off and to the neutral terminal if the switch is on, but canno be clamped to the negative terminal.

Table 2 below lists the available vectors in the first 60 degreesinterval and the respective switching state. It has been considered thatthe input current is in phase with the respective source voltage.

TABLE 2 Available vectors for the first 60 degrees interval. Vector S₁S₂ S₃ {overscore (a)}₆ (PNP) off off off {overscore (b)}₆ (PNO) off offon {overscore (c)}₆ (POP) off on off {overscore (c)}₁ (POO) off on on{overscore (b)}₅ (ONP) on off off {overscore (d)}₆ (ONO) on off on{overscore (c)}₅ (OOP) on on off {overscore (z)}₂ (OOO) on on on

FIG. 5 shows the space vector representation for the first 60 degreesinterval. A sinusoidal three-phase voltage waveform is represented inthe space plane as a circle; the radius of the circle is related to thevoltage amplitude.

At any instant, the points of the circle should de generated by acombination of the available vectors. For a switching frequency highenough, the medium value in a period can be considered as a point in thespace plane A single vector can only generate one point; combining twovectors and changing their dwell time, the straight line that link temcan be generated. Then, to generate any point inside a sector, at leastthree vectors are needed.

Advanced vector control schemes divides the space plane in triangularsectors and the sinusoidal PWM waveform is generated by switching amongthe three vectors that correspond to the apices of the triangle thatcontains the respective point of the circle at that instant. [R. Rojas,T. Ohnishi, T. Suzuki, “An Improved Voltage Vector Control Method forNeutral-Point-Clamped Inverters”, IEEE Transactions on PowerElectronics, vol. 10, No 6, pp. 666-672, 1995].

For area 1 in FIG. 5, the vectors used are {right arrow over (c)}₅(OOP), {right arrow over (b)}₆ (ONP), {right arrow over (c)}₆ (POP) and{right arrow over (d)}₆(ONO). Generally this is executed by usinghysteresis controllers and complicated look-up tables. The major problemassociated with hysteresis control is that the switching frequencyvaries throughout the AC supply cycle.

In order to fix the switching frequency, carriers should be used tomodulate the pulse width. A method that uses saw-tooth carriers toobtaining the command signals is illustrated in FIG. 5. The currentreference is compared with the respective high-frequency saw-toothcarrier. To simplify the analysis the three carriers are supposed to besynchronized. The i_(u)*, i_(v)* and i_(w)* signals represent the outputof the respective current controller (modulating signal); they aresupposed to be constant during the switching period. As can be seen fromthe figure there are 4 switching states per period, corresponding to thevectors {right arrow over (z)} (OOO), (ONO), (ONP) and (PNP). Certainlythose vectors give a picture of a bigger triangle in the space vectorrepresentation plane which results in lower quality of the waveformgeneration.

To overcome the drawbacks of the former mentioned techniques a differentapproach is considered in this work. The modulating signals are fedtogether with two high-frequency triangular carriers to the pulse-withmodulator. The two carriers are of the same amplitude but 180 degreesphase-shifted; the first is used during the positive half cycle of theutility sinusoidal voltage and the other during the negative one. Theprinciple of this technique is illustrated in FIG. 7. The modulatingsignals i_(u)* and i_(w)* are compared with Trg1 because thecorresponding source voltages are positive during this interval (0˜60degrees) and i_(v)* is compared with Trg2 because it is negative. It isclear from FIG. 3 that with the same switching frequency the new controlmethod generates eight states per period due to an appropriatedistribution of the command pulses. The vectors used are (PNP), (ONP),(POP) and (ONO) which match up with the vectors selected by advancedvector control methods. Consequently, the input current ripple will besmaller with the new proposed control and having the advantage ofconstant switching frequency. Moreover, the “apparent switchingfrequency” is twice as that of the former control method because thereare eight states per period instead of four.

II. 3. Output Voltages' Balance.

The neutral point potential is not a rigid voltage source; it isgenerated by the series connection of the DC-link capacitors. Thus, itis not certain that the two output voltages will remain equal. On thecontrary, the neutral point potential will increase or decreaseaccording to the charging-discharging action of the capacitors.

However, the capacitor voltages should be maintained in balancedcondition to guarantee the true three-level operation throughout thewhole range of voltage control. If it is violated the output may containundesirable harmonic; moreover, if the neutral point potential deviatesof its balanced condition the voltage over the switching devices or thecapacitors may increase over their ratings and it makes impossible tooperate the converter any longer; irreparable damages may occur.

Different from hysteresis based control methods, the proposed modulationtechnique is well symmetrical; therefore, symmetrical charge of thecapacitors can be expected. Load is usually symmetrical as well, butslight imperfections in the circuit may promote neutral point voltagedrift. Therefore, explicit control over the neutral point voltage mustbe implemented together with input current control.

Neutral point potential deviations are related with the process ofcharge and discharge of the DC-link capacitors. The input current givesthe capacitor charge through the power semiconductor devices. The fivegroups of vectors produce different charge currents in the capacitors.

The connection between utility and DC-link capacitors for the fivegroups of vectors is illustrated in FIG. 8. The vectors of group “a”does not present any connection with the neutral point (“O”), therefore,the charge current is the same for both capacitors. On the other hand,no charge current is given to the capacitors when using vectors of group“z”.

Different capacitor charge takes place only for vectors of groups “b”,“c”, and “d”; this fact can be exploited to control the neutral pointpotential. From FIG. 8 it is clear that a vector of group “c” chargescapacitor C₁ and a vector of group “d” charges capacitor C₂.

Since vectors of groups “c” and “d” generate the same rectifier inputterminal voltage, interchanging between them do not alter the inputcurrent control. Therefore, the neutral point potential can becontrolled by acting on the dwell time of vectors of groups “c” and “d”.

The same principle may be used for other advanced modulation techniques;however they differ in the way of controlling the dwell times. A numberof methods to carry out the control has been considered, one of themusing an additional hysteresis controller together with look-up tables,another method uses a cosine curve with a frequency three times the mainfrequency (utility).

The invention described here proposes to add a quantity proportional tothe deviation to the input current reference waveform. In such a way aDC value will be added or subtracted to the modulating signal for thepositive or negative halve cycle of mains voltage respectively.

After comparison with the triangular carrier, this will reflect in anincrease of the “c” group vector dwell time and a decrease of the “d”group vector dwell time without altering the dwell time of othervectors. This fact is illustrated in FIG. 9; in FIG. 9(a) a small DCquantity was added to the reference signals and in FIG. 9(b) the samevalue was subtracted. Notice that the dwell time of vectors {right arrowover (c)}₅ (OOP) and {right arrow over (b)}₅ (ONP) remain inalterablewhereas the dwell time of (POP) reduces in FIG. 9(a) and increases inFIG. 9(b). The opposite situation occurs with (ONO), which increases inFIG. 9(a) and reduces in FIG. 9(b).

II. 4. Control System.

The block diagram of the control system is given in FIG. 10. Analoguecontrol signals are derived from the utility voltage, input current andfrom the output voltages. These signals are conditioned and combined toform the modulating signals that are fed, together with twohigh-frequency triangular carriers, to the pulse-width modulators. Thedigital outputs of the modulators provide the drive signals for theconverter power switches. More details of the control blocks will now bedescribed.

Referring to FIG. 10, a signal representing the output capacitorvoltages is derived from a potential divider (1) and subtracted in (2)to obtain the total output voltage. This signal is compared with a DCreference voltage and regulated with a compensator (3), which generatethe amplitude of the current reference.

The waveform of the current reference is derived from the utilityvoltage, which is sensed from potential dividers (4). Since the mainsneutral is not available, an analog circuitry (5) is used to obtain thephase-voltage waveforms. This circuitry also gives the logic signals todiscriminate the positive half cycle from the negative one. The sum ofthe positive and negative output voltages given by (6) represents thedeviation of the neutral potential form its balanced condition. Thissignal is added to the phase voltages to obtain the balance control asexplained above.

After the summing block (7) the signals are rectified in (8) to generatethe current waveform reference. The current references are obtained bymultiplying in (9) their common amplitude by the respective waveform;this signal represents a sinusoidal current proportional to the voltageerror.

The actual currents are derived using current transformers withHall-effect sensor (10) and then rectified in (11). The modulatingsignals are derived from analog controllers (12) that compare therespective actual and reference current to generate a compensationsignal. Analog signal-switches (13) are used to exchange the twotriangular carriers; the analog switch commands are given by (5).

The modulating and carrier signals are fed to a pulse-width modulator(14), which generates the drive signal for the respective converterpower switch.

DESCRIPTION OF THE DRAWINGS

FIG. 1 shows some of the most important configurations of thethree-phase three-level boost-type rectifier.

FIG. 2 shows an equivalent circuit of the three-phase three-levelboost-type rectifier.

FIG. 3 shows the planar space vector representation of the rectifierswitching states.

FIG. 4 shows an equivalent circuit of the converter.

FIG. 5 shows the space vector representation of the first 60 degreesinterval.

FIG. 6 shows the command signal generation for the singlesaw-tooth-carrier modulation-technique.

FIG. 7 shows the command signal generation for the proposed modulationmethod.

FIG. 8 shows the connection between utility supplier and DC-linkcapacitors for the five different vector groups.

FIG. 9 shows the effect of adding a DC quantity to the waveformreference.

FIG. 10 shows the block diagram of the entire control system.

FIG. 11 illustrates the minimum pulse width limitation.

FIG. 12 shows the line-to-line voltage shape for (a) single saw-toothtechnique, and (b) proposed modulation technique.

FIG. 13 shows the ripple factor for the proposed modulation technique.

FIG. 14 shows the ripple factor for the conventional single-phase boosttype rectifier.

FIG. 15 shows the maximum modulation index to fully control the neutralpoint potential.

FIG. 16 shows the simulated waveforms of the input currents.

FIG. 17 shows the simulated waveforms of the input terminal voltagese_(uv) and e_(uO).

FIG. 18 shows the simulation results of the input terminal voltagee_(uv) and source voltage e_(ab).

FIG. 19 shows the simulation results of phase voltage and input current.

FIG. 20 shows the waveforms experimentally obtained of the Input currentfor e_(ab)=220V and P_(o)=6.5 kW.

FIG. 21 shows the experimental results of the input current waveformsfor e_(ab)=380V and P_(o)=12.5 kW.

FIG. 22 refers to the experimental results of load transient from 6.6 kWto 9.5 kW.

DETAILED DESCRIPTION

The achievements of the proposed control method will now be described ingreater detail. The items considered are: controllability of the outputvoltage, switching frequency variations, input terminals voltagewaveform, input current ripple, neutral potential balance, controlcircuit simplicity and feasibility demonstrated by simulation andexperimental results. It is important to remark that the proposedcontrol method keeps the advantageous characteristics of the three-phasethree-level boost-type rectifiers such as:

Low voltage stress on the switching devices. Since the blocking voltageis only half the total DC-link, it allows the use of power switches withbetter higher switching frequency capability, smaller voltage drop whenconducting and cheaper price.

There is no possibility of shot-though current on the rectifier arm; andtherefore the gating of the switches is simplified and the circuitbecomes more robust in operation.

Generates two output voltages: positive and negative permitting the useof one or two loads in the output terminals. In isolated power suppliesapplications, as the case of telecommunication equipment, this allowsthe use of two DC-DC converters as the second stage.

IV. 1. Controllability of the Output Voltage

A simple analysis of the controllability of the output voltage can bedone with the aid of FIG. 5 that shows the space vector representationof the converter switching states. At first, it is important to rememberthat balanced sinusoidal three-phase voltages are represented in thespace plane as circles which radius is given by the amplitude of thesinusoidal waveform. Therefore, the figure gives a relation between theinstantaneous average sinusoidal voltage at the rectifier inputterminals and the output voltage.

On the other hand, remember that any point inside the area delimited bythe straight lines that join the vectors can be generated by a linearcombination of the three closed vectors. If the voltage drops in theboost inductors is small (which is normally the case), the instantaneousaverage voltage at the rectifier input terminals is near equal to theutility voltage. Then, it can be considered that FIG. 5 correlates theinput and output voltages.

The utility voltage may be written in an equation form as:$\begin{matrix}{\begin{matrix}{e_{un} = {V_{fp} \cdot {\sin (\theta)}}} \\{e_{vn} = {V_{fp} \cdot {\sin \left( {\theta - \frac{2 \cdot \pi}{3}} \right)}}} \\{e_{wn} = {V_{fp} \cdot {\sin \left( {\theta + \frac{2 \cdot \pi}{3}} \right)}}}\end{matrix}{or}} & (4) \\\begin{matrix}{e_{uv} = {V_{Lp} \cdot {\sin \left( {\theta + \frac{\pi}{6}} \right)}}} \\{e_{vw} = {V_{Lp} \cdot {\sin \left( {\theta - \frac{\pi}{2}} \right)}}} \\{e_{wu} = {V_{Lp} \cdot {\sin \left( {\theta + \frac{5 \cdot \pi}{6}} \right)}}}\end{matrix} & (5)\end{matrix}$

The modulation index (“m”) is defined as the relation between theline-to-line peak voltage and the total DC-link voltage then:$\begin{matrix}{m = {\frac{V_{Lp}}{2 \cdot E_{d}} = \frac{\sqrt{3} \cdot V_{fp}}{2 \cdot E_{d}}}} & (6)\end{matrix}$

where:

m=modulation index

V_(fp)=Phase peak voltage

V_(Lp)=Line-to-line peak voltage

E_(d)=partial output voltage

θ=ωt

From FIG. 5 it can be seen it is possible to work with modulationindexes smaller than 1 and greater than zero. The minimum output voltageis obtained for a modulation index equal to 1; this case is representedas the circle with the greater radius where we have:

2·E _(d(max)) =V _(Lp)={square root over (3)}·V _(fp)  (7)

Theoretically the maximum output voltage is unlimited, but in practiceit is limited by the minimum pulse-with allowed and principally by thevoltage ratings of the converter elements.

In conclusion, the proposed control method of the present inventionallows full control of the converter output voltage covering the maximumrage possible with the converter configuration. Moreover,over-modulation (m>1) is also possible provided that the input currentdistortion and the variation of the switching frequency that thiscondition may produce, are within acceptable levels.

IV. 2. Switching Frequency Variations

The power switches forming the converter must operate to generate therequired waveforms and two commonly used methods of modulation arehysteresis control and fixed-frequency pulse-width modulation (PWM).

With hysteresis control, limit bands are set on either side of a signalrepresenting the desired waveform. The converter switches are operatedas to maintain the generated signal within the limits. The dead-band,between the limits, may be proportional to required signal, constantwidth or have both fixed and proportional components. More complexdead-band control is also possible. A proportional dead-band implieszero bandwidth at zero output demand, leading to practical problems incontrol implementation. A constant-width dead-band results in a higherpercentage level of switching-frequency ripple current at low levels.For these reasons, the use of a dead-band having both constant andproportional components is often preferred.

A major problem associated with hysteresis control is that the switchingfrequency varies throughout the AC supply cycle. The crossing time ofthe signal with the limit bands are functions of the output voltage, theinstantaneous AC supply voltage and the magnitude of the currentdemanded. The switching frequency is, therefore, variable.

Variable frequency operation makes compliance with EMC regulations moredifficult since the frequency of the dominant ripple current is nolonger known. With a fixed-frequency PWM converter system, the design ofa passive EMI filter to reduce switching frequency components toacceptable levels is more simple since switching frequency is known. Theproposed control uses two triangular carriers of the same amplitude andfrequency but phase-shifted 180 degrees. This fixes the switchingfrequency of the power devices simplifying the EMI filter design.

On the other hand, with practical power switching devices andcontrollers there are minimum acceptable times for switch conduction(pulse-width). If these times are ignored, switching losses may becomeexcessive as a result of switch operation in the linear region. Devicetemperatures may easily rise to levels at which failures occur. Besidesif the modulating signal goes over the peak of the triangular carrier,switching pulses are lost altering the fixed switching frequency desiredoperation.

To prevent operation in this condition, a minimum pulse width set hasbeen considered. The minimum pulse width limitation is achieved bylimiting the amplitude of the modulating signal delivered by the currentcompensator shown in FIG. 10 as block (11). The operation of this limitis illustrated in FIG. 11. The modulated signal amplitude is constrainedso that it never exceeds the limit value; the PWM duty cycle can varyonly up to this level. This approach gives to advantages, it sets theminimum pulse width to a predetermined value and effectively fixes theswitching frequency to the magnitude given by the triangular carrier.

IV. 3. Input Terminals Voltage Waveform

As illustrated in FIG. 4, the rectifier can be treated as a voltagesource connected to the utility supplier through the boost inductors.For the input current to be sinusoidal, the rectifier input terminalvoltage should be sinusoidal as well. Then, the closest to sinusoidal isthe PWM voltage waveform, the better input current waveform will bedrawn from the AC source. Therefore, the input terminal voltage waveformis a very important parameter to take care for.

There are two parameters to analyze with respect to the sinusoidal PWMwaveform: the harmonic contents and the maximum step change. Theproposed modulation takes advantage in both parameters.

The maximum step change in the input terminal voltage can be determinedfrom the instantaneous voltages generated by the rectifier switchingstates (vectors). Those voltages are listed in Table 3 below for one ofthe possible sequences. By inspection of Table 3 it is possible todetermine that the maximum step from one state to the following is equalto E_(d); that is half of the total DC-link voltage.

TABLE 3 Instantaneous line-to-line voltages generated by the proposedtechnique. Vector {overscore (d)}₆ {overscore (b)}₅ {overscore (c)}₅{overscore (c)}₆ {overscore (c)}₆ {overscore (c)}₅ {overscore (b)}₅{overscore (d)}₆ State (ONO) (ONP) (OOP) (POP) (POP) (OOP) (ONP) (ONO)e_(uv) E_(d) E_(d) 0 E_(d) E_(d) 0 E_(d) E_(d) e_(vw) −E_(d) −2E_(d)−E_(d) −E_(d) −E_(d) −E_(d) −2E_(d) −E_(d) e_(wu) 0 E_(d) E_(d) 0 0E_(d) E_(d) 0

Table 4 below gives the instantaneous voltages of the vector sequenceused by the single saw-tooth carrier technique, in which case themaximum step is equal to 2E_(d) that is twice the value obtained withthe proposed method.

TABLE 4 Instantaneous line-to-line voltages generated by the singlesaw-tooth carrier technique. Vector {overscore (z)}₂ {overscore (d)}₆{overscore (b)}₅ {overscore (a)}₆ {overscore (z)}₂ {overscore (d)}₆{overscore (b)}₅ {overscore (a)}₆ State (OOO) (ONO) (ONP) (PNP) (OOO)(ONO) (ONP) (PNP) e_(uv) 0 E_(d) E_(d) 2E_(d) 0 E_(d) E_(d) 2E_(d)e_(vw) 0 −E_(d) −2E_(d) −2E_(d) 0 −E_(d) −2E_(d) −2E_(d) e_(wu) 0 0E_(d) 0 0 0 E_(d) 0

FIG. 12 shows the area where switching may occur for the singlesaw-tooth modulation and the proposed modulation. It is clear that theminimum step is obtained by the proposed modulation. Moreover, the PWMwaveform is closer to a sinusoidal in the proposed technique.

Due to the smaller step change the harmonic contents of the waveform issmaller, but another advantage of the proposed technique is that due tothe use of two triangular carries phase-shifted 180 degrees, a greatamount of harmonic components are cancelled reducing further theharmonic contents of the waveform.

IV. 4. Input Current Ripple

The input current contains a high-frequency saw-tooth waveform ripple.The saw-tooth form depends upon the point in the AC supply cycle and theswitching duty cycle at which the converter is momentarily operating.The form varies from fast rise and slow fall, thorough balancedtriangular from to slow rise and sharp fall. The carrier ripple hascomponents at the switching frequency and all of its harmonics, theamplitude of a component being inversely proportional to its order.

The high frequency current ripple may be defined as the differencebetween the maximum and minimum instantaneous value that the currenttakes in one switching period. Between the small time extent forcommutation of two switching states the AC source and converter inputterminals voltages could be considered constant. Therefore the voltageacross the boost inductor will be also constant. Considering theequivalent circuit of FIG. 4, the variation of the current through theinductor can be calculated by $\begin{matrix}{{{\Delta \quad i} = {{\frac{V_{L}}{L} \cdot \Delta}\quad t}}{{then}\text{:}}} & (8) \\{{\Delta \quad i_{u}} = {{\frac{e_{an} - e_{un}}{L} \cdot \Delta}\quad t}} & (9)\end{matrix}$

where e_(an) is AC source phase-voltage, which is a known value, e_(un)is the rectifier input terminal voltage refereed to the mains neutral, Lis the boost inductor inductance and ΔT the time interval. The inputterminal voltage e_(un) is a function of the switching state and theoutput voltage; it can be derived from the voltages listed in Table 1as: $\begin{matrix}{e_{un} = {e_{uO} - \frac{e_{uO} + e_{vO} + e_{wO}}{3}}} & (10)\end{matrix}$

The time interval that a switching state is applied is given by theproduct of the dwell time of the respective vector times the period ofthe triangular carrier. The dwell time is calculated consideringgeneration of sinusoidal PWM waveform at the rectifier input terminals.

After some mathematical calculations and simplifications the expressionthat defines the input current ripple can be written as: $\begin{matrix}{{\Delta \quad i_{u{(\max)}}} = \frac{E_{d} \cdot {i_{u}\left( {\theta,m} \right)}}{6 \cdot f_{s} \cdot L}} & (11)\end{matrix}$

where:

Δi_(u(max))=maximum value of input current ripple

E_(d)=partial output voltage

f_(s)=triangular carrier frequency

L=boost inductor inductance

θ=ωt=instantaneous phase-angle of AC voltage source

m=modulation index

i_(u)(θ, m)=ripple factor given in the curves of FIG. 13

As can be seen from FIG. 13 the maximum value of the ripple factor isabout 0.7; then the relation for calculating the ripple current can besimplified as: $\begin{matrix}{{\Delta \quad i_{u{(\max)}}} = \frac{E_{d} \cdot 0.7}{6 \cdot f_{s} \cdot L}} & (12)\end{matrix}$

For comparison purpose, the input current ripple obtained with theconventional single-phase boost-type rectifier has been calculated. Theresults are given in (13) and again the i(θ,m) represent the ripplefactor which for the case of the single phase boost-type rectifier isgiven by the curves of FIG. 14. $\begin{matrix}{{\Delta \quad i_{({{single} - {phase}})}} = {\frac{Vo}{{fs} \cdot L} \cdot {i\left( {\theta,m} \right)}}} & (13)\end{matrix}$

FIG. 14 shows that the maximum value of i(θ,m) is 0.25, then the inputcurrent ripple for the conventional single-phase boost-type rectifiercan be simplified as: $\begin{matrix}{{\Delta \quad i_{({{single} - {phase}})}} = \frac{0.25 \cdot {Vo}}{{fs} \cdot L}} & (14)\end{matrix}$

It should be remembered that the total output voltage in the three-levelthree-phase rectifier is equal to Vo=2E_(d). Considering the sameswitching frequency and the same boost inductor value, from equations(12) and (14) we get:

Δi _(u(max))=0.23·Δi _((single-phase))  (15)

Relation (15) demonstrates that the proposed modulation technique caneffectively reduce, a great amount, the input current ripple. This iscertainly one of the best characteristic of the proposed control method.

IV. 5. Neutral Potential Balance

Variation of the DC-link neutral point potential is an inherent problemin three-level converter configurations. It is required that the two DCcapacitor voltages should be maintained in balanced conditions to avoidundesirable harmonics and reduce the ratings of the converter elements.

In the former sections this problem was considered and a method tocontrol the neutral potential was introduced. Here we would like toreinforce the fact that the method proposed to balance the outputvoltages is simple and permits a wide range control without altering thewaveforms of the generated voltage and current.

Considering a balanced load connected to the rectifier output, thevariations on the neutral potential takes place only when vectors ofgroups “b”, “c” and “d” are used. The method is basically characterizedby controlling the dwell time of the small positive “c” and smallnegative “d” vectors to compensate the variations introduced by themedium size vectors and small imperfections that an actual design alwayshas.

The control operation can be defined as the application of certain dwelltime of the available vectors in each are in order to obtain sinusoidalPWM waveforms. The instantaneous average value of the PWM waveform willbe the sum of the products of the voltage vector by the respectivedwell-time. For example, in area 2 of FIG. 5 the control operation is:$\begin{matrix}{\overset{\rightarrow}{v} = {\begin{bmatrix}e_{un} \\e_{vn} \\e_{wn}\end{bmatrix} = {{{\alpha_{1} \cdot \left\lbrack {\overset{\rightarrow}{a}}_{6} \right\rbrack} + {\alpha_{2} \cdot \left\lbrack {\overset{\rightarrow}{b}}_{5} \right\rbrack} + {\alpha_{3c} \cdot \left\lbrack {\overset{\rightarrow}{c}}_{6} \right\rbrack} + {\alpha_{3d} \cdot \left\lbrack {\overset{\rightarrow}{d}}_{6} \right\rbrack}} = \begin{bmatrix}{V_{fp} \cdot {\sin (\theta)}} \\{V_{fp} \cdot {\sin \left( {\theta - {2 \cdot {\pi/3}}} \right)}} \\{V_{fp} \cdot {\sin \left( {\theta + {2 \cdot {\pi/3}}} \right)}}\end{bmatrix}}}} & (16)\end{matrix}$

where α represents the dwell time of the respective vector

As we know the load connections for each switching state (FIG. 8) thecurrent through the neutral terminal (“O”) is also known. For area 2this current results in:

i _(O)=α₂ ·i _(u)+α_(3c) ·i _(v)−α_(3d) ·i _(v)  (17)

To maintain the DC-link capacitors balanced, the instantaneous mainvalue of the neutral current should the zero. As mentioned before, thesmall positive and small negative vectors generate the same inputterminal voltage then it is possible to vary their dwell time withoutaltering the generated waveforms; however the sum of α_(3c)+α_(3d)should remain equal to α₃ which is the value required for the sinusoidalPWM. Then, in area 2 it is possible to control the neutral current onlywithin the range given by:

−|α₃ ·i _(v)|≦|α₂ ·i _(u)|≦|α₃ ·i _(v)|  (18)

Another restriction is inherent to the dwell time concept; it must be apositive quantity, it is physically impossible to generate negativedwell-time. Taking into account those restrictions we can find out theneutral potential controllable region. FIG. 15 shows the controllableregion of the neutral point potential. Notice that for balanced loadsthe neutral potential is full controllable in 96% of the operationalrange. In the reminder 4% instantaneous deviations may occur, but theiraverage value over a longer period is null (one cycle of the AC sourcevoltage). Then a small ripple with a frequency three times the sourcevoltage frequency may appear, but for practical system this ripple isinsignificant.

To put it briefly, the proposed control technique allows an effectivecontrol of the neutral potential over almost the whole extent of outputvoltage control, and with a simpler circuit it obtains the maximumpossible controllable range of the neutral point potential that thetopology permit.

IV. 6. Control Circuit Simplicity

The simplicity of the control circuit is one of the most importantaccomplishments of the proposed method. The use of DSP (Digital SignalProcessor) is relatively frequent in advanced control designs, it mayincrease the versatility of the converter. However, besides it highercost and complexity, it may require longer time to reach steady state ofoperation and may have switching frequency limitations. Moreover, thefaster response of the analogue controller may offer and advantageouscontrol in transient operation.

The proposed control circuit may be designed basically with cheap andwell proved operational amplifiers. Hall effect current sensors arerecommended to sample the input current and provide linearity andisolation. Those are probably the most expensive elements of the controlcircuit. Besides them, the straightforward concept of the proposedmethod allows to make simpler the control system design as illustratedin the block diagram of FIG. 10.

IV. 7. Simulation and Experimental Results

Simulations and experiment were performed to verify the feasibility ofthe proposed control method. The simulations were carried out with theaid of the simulator package SABER. The circuit of FIG. 1(a) wassimulated under the following parameters:

Output power: P_(o) = 12 kW Line-to-line AC source voltage: e_(ab) = 380V AC source frequency: f = 60 Hz Partial output voltage: E_(d) = 400 VBoost inductor: L_(u) = L_(v) = L_(w) = 270 μH Switching frequency:f_(s) = 70 kHz DC-link capacitors: C₁ = C₂ = 2800 μF Resistive load:R_(L1) = R_(L2) = 26.67Ω

FIG. 16 shows the current through the three input lines. From the figurewe can be clearly appreciate the high quality of the current which, inspite of the small boost inductance used, presents a sinusoidal waveformwith very small ripple. Moreover, the three currents are well balanced.

FIG. 17 shows the waveforms of the input terminal voltages. The upperwave represents the potential difference between terminal “u” andterminal “v” (see FIG. 1(a)) and the lower represents the voltagebetween terminal “u” and the DC-link voltage neutral point “O”. Bothwaveforms confirm the analysis performed in the former sections. Thee_(uO) waveform presents three switching levels +400V, 0V and −400V;whereas the line-to-line e_(uv) waveform exhibits five levels: +800V,+400V, 0V, −400V, −800V.

FIG. 18 shows the input terminal e_(uv) and AC source voltage e_(ab)waveforms. As predicted in the theoretical analysis, the switchinglevels in the e_(uv) voltage change in optimal angles so that it allowsthe generation of the sinusoidal PWM waveform by switching among the twocloser levels and minimize the voltage step (equal to 400V in thiscase).

FIG. 19 shows the AC source phase voltage an its respective inputcurrent. The Figure demonstrates that the current is practicallysinusoidal with low THD (total harmonic distortion) and high powerfactor.

To verify the validity of the proposed control method experimentally, anactual prototype was constructed and tested in the laboratory. InsulatedGate Bipolar Transistors (IGBT) were used as the switching devices ofthe three-phase three-level boost-type rectifier. The configuration usedwas that shown in FIG. 1(a). The parameters for the experiment were:

Maximum output power: P_(o) = 12 kW Line-to-line AC source voltage:e_(ab) = 220 V and AC source frequency: f = 60 Hz Partial outputvoltage: E_(d) = 400 V Boost inductor: L_(u) = L_(v) = L_(w) = 270 μHSwitching frequency: f_(s) = 60 kHz DC-link capacitors: C₁ = C₂ = 2800μF

FIG. 20 shows the input current for a line-to-line AC source voltage of220V and P_(o)=6.5 kW. Clearly, the current presents a good qualitysinusoidal waveform. The total harmonic distortion measured was of 2.5%.

FIG. 21 shows the input current for e_(ab)=380V and P_(o)=12.5 kW. Sameas in the former figure, the current presents a nearly sinusoidalwaveform. In this case the measured THD was of 3.8%.

FIG. 22 shows the transient response for a step change in the load. Theoutput power step was from 6.65 kW to 9.5 kW whereas the input AC sourcevoltage was kept at 380V. In the figure are shown from top to bottom thetwo partial output voltages (only the AC component), the input currentand the total DC link voltage (again, only the AC component). As can beseen, in steady state (before the load transient), the output voltagesremain balanced with very small ripple. At the instant of load changethere is a deviation of the balance condition but it is smaller than 3%and quickly return to the steady state condition, it is balanced outputvoltages. The current presents a sinusoidal waveform before, during, andafter the transient.

Simulations and experiment confirmed the theoretical analysis andverified the feasibility of the proposed control method.

What is claimed is:
 1. Synchronized control method for controlling thetotal output voltage, generate sinusoidal input currents and balance thetwo partial output voltages in a three-phase three-level boost-typerectifier, characterized by using first and second triangular carrierswith the same amplitude and 180 degrees phase-shifted for the PulseWidth Modulation (PWM), the first triangular carrier being used duringthe positive half cycle and the second triangular carrier for thenegative half cycle of the respective phase voltage, while acting overthe input current waveform reference to balance the output voltages. 2.Synchronized control method for a three-phase three-level boost-typerectifier, according to claim 1, characterized besides by the fact thatthe switching pulses are synchronized and appropriately distributedallowing a reduction in the input current ripple.
 3. Synchronizedcontrol method for a three-phase three-level boost-type rectifier,according to claim 1, characterized besides by including a sensor thatacts over the waveform of the input current reference provoking aneffective balance of the output voltages.
 4. Synchronized control methodfor a three-phase three-level boost-type rectifier, according to claim1, also characterized by including an analog switch (13) in each phasepermits the interchange among the first and second triangular carriers.5. Synchronized control method for a three-phase three-level boost-typerectifier, according to claim 1, characterized besides by the fact thatthe command signal of the switching devices is obtained by thecomparison of the respective reference with the first and secondtriangular carriers.
 6. Synchronized control method for a three-phasethree-level boost-type rectifier, according to claim 1, characterizedbesides by the fact that the switching frequency is constant. 7.Synchronized control method for a three-phase three-level boost-typerectifier, according to claim 1, characterized by the fact that theoutput center point balance is achieved by adding the positive andnegative output voltages and using the sum as an error signal to modifythe current waveform reference.
 8. Synchronized control method for athree-phase three-level boost-type rectifier, according to claim 7,characterized by an accurate regulation of the center point potential.9. Synchronized control method for a three-phase three-level boost-typerectifier, according to claim 1, characterized by the fact that themodulating signals are fed together with the first and second triangularcarriers having high frequencies to the pulse width modulator (14). 10.Synchronized control method for a three-phase three-level boost-typerectifier, according to claim 1, characterized by the fact that with thesame switching frequency it generates eight states per period due to anappropriate distribution of the command pulses.
 11. Synchronized controlmethod for a three-phase three-level boost-type rectifier, according toclaim 1, characterized by the fact that symmetrical charge of thecapacitors can be expected because the proposed modulation technique iswell symmetrical.
 12. Synchronized control method for a three-phasethree-level boost-type rectifier, according to claim 1, characterized bythe fact that adds a quantity proportional to the deviation to the inputcurrent reference waveform, in such a way that a DC value will be addedor subtracted to the modulating signal for the positive or negativehalve cycle of mains voltage respectively.